The back-end semiconductor manufacturing process refers to the IC packaging and testing that people often hear about. Specifically, the process known as chip probing (CP) is conducted to test the ...
This application note presents the combinations of the features of modules and discrete in a new power semiconductor package. The document describes the packaging technology, the topologies and ...
MILPITAS, Calif., Sept. 21, 2020 /PRNewswire/ -- Today, KLA Corporation (NASDAQ: KLAC) announced the launch of the Kronos™ 1190 wafer-level packaging inspection system, the ICOS™ F160XP die sorting ...
TOKYO--(BUSINESS WIRE)--Shin-Etsu Chemical Co., Ltd. (TOKYO: 4063) (Head Office: Tokyo; President: Yasuhiko Saitoh; hereinafter, “Shin-Etsu Chemical”) has developed equipment to manufacture ...
The Simcenter Micred Quality Tester from Siemens enables the assessment of a semiconductor package's thermal structure to identify manufacturing defects, including die-attach issues. With the ...
In this work, we propose a new signal routing method for solving routing problems that occur in the design process of semiconductor package substrates. Our work uses a topological transformation of ...
The industry is investing in more precise and productive inspection and testing to enable advanced packages and eventually, 3D ICs. The next generations of aerospace, automotive, smartphone, and ...
TOKYO--(BUSINESS WIRE)--Resonac Corporation (TOKYO:4004) (President: Hidehito Takahashi, hereinafter “Resonac”) has developed a temporary bonding film to be used for supporting a wafer on a glass ...
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