EDN

Enhanced Serial Peripheral Interface Master/Slave Controller

DCD-SEMI, a leading IP core provider and SoC design house based in Poland, has mastered a unique DeSPI IP Core. It is a fully configurable enhanced serial peripheral interface (eSPI) master/slave ...
EDN

Quad performance serial peripheral interface

Master/Slave with not only single and dual but most of all quad SPI Bus support, is the newest IP Core introduced by Digital Core Design. The DQSPI system is flexible enough to interface directly with ...
Design-Reuse

Serial Peripheral Interface. SPI, these three letters denote everything you asked for

Electronics is everywhere, especially these days. Many times, as frequent users, we do not even notice a “paradigm change” in the things we use on regular basis. We use a fridge, but we do not care ...
Electronic Design

Isolate Your High-Speed SPI Bus Despite Long Propagation Delays

The serial peripheral interface (SPI) bus is a synchronous, full-duplex, serial data link commonly used for the short-distance data exchange between a master device, such as a microcontroller unit ...
Design-Reuse

Enhanced Serial Peripheral Interface (eSPI) Master/Slave Controller

Bytom, Poland -- June 28, 2022 --DCD-SEMI, a leading IP Core provider and SoC design house from Poland has mastered unique DeSPI IP Core. It is a fully configurable eSPI master/slave device supporting ...